Case ID: M24-187P

Published: 2024-10-08 09:42:04

Last Updated: 1728380524


Inventor(s)

Saeed Zeinolabedinzadeh

Technology categories

Energy & PowerPhysical ScienceWireless & Networking

Licensing Contacts

Physical Sciences Team

Time-Interleaved Transceiver Architecture

Background

Phased array receivers and analog-to-digital converters (ADCs) are essential for processing high-frequency signals in critical fields like communications and radar. These systems rely on ADCs to convert analog signals into digital forms, enabling precise data analysis and real-time data processing. However, traditional ADC designs face significant bandwidth limitations as they require signals to be distributed across multiple parallel channels. Distribution processes not only increase complexity but also restrict the system’s ability to handle larger bandwidths efficiently, significantly limiting overall performance.

Invention Description

Researchers at Arizona State University have developed an innovative phased array receiver and analog-to-digital converter (ADC). This technology enables time interleaving without requiring signal distribution between parallel channels. This breakthrough design eliminates the bandwidth limitations typically caused by signal distribution, enabling the ADC to support large bandwidth operations constrained solely by digitization speeds. ADC also makes significant leaps in operational efficiency, reducing power consumption and heat.

Potential Applications:

  • Cellular base stations
  • Wi-Fi access points
  • Defense communication radar systems

Benefits and Advantages:

  • Significantly reduces power consumption and cooling requirements
  • Increases scalability
  • Eliminates the need for high-frequency oscillator distribution
  • Adaptively reconfigurable receiver