Invention Description
Analog-to-digital converters (ADCs) translate continuous analog signals into discrete digital numbers. Because modern computing relies on digital data, which is easier to store, manipulate, and transmit, ADCs are the bridge connecting the physical world to electronics. Better ADCs are vital for supporting next-gen technologies such as 5G/6G bandwidths, crisper resolution in medical imaging, and real-time AI processing.
Researchers at Arizona State have developed an innovative amplifier system to improve the closed-loop gain accuracy of amplifier and boost the negative feedback factor. The novel design features key components which work together across sampling, estimation, and level-shift phases to store charge and increases the effective open-loop gain efficiently. This reduces gain error and relaxes the need for high open loop gain. Further, it effectively improves the closed-loop bandwidth and minimizes error voltage, enhancing signal-to-noise and distortion ratio (SNDR) in pipeline-SAR ADCs while maintaining minimal area and loading overhead. Multiple configurations enable optimized performance adjustments, supporting both hardware and software implementations.
This novel amplifier design enhances pipeline ADC performance for accurate closed-loop gain with reduced gain error.
Potential Applications
- High-precision pipeline and pipeline-SAR analog-to-digital converters
- Consumer electronics requiring accurate signal conversion
- Medical imaging and instrumentation systems needing enhanced ADC performance
- Communication systems with stringent signal integrity demands
- Industrial measurement and control applications
Benefits and Advantages
- Achieves precise closed-loop amplifier gain with reduced gain error
- Improves feedback factor and closed-loop bandwidth
- Minimizes open-loop gain requirements, simplifying amplifier design
- Enhances SNDR in pipeline-SAR ADCs without additional clock phases
- Imposes minimal area and loading overhead on circuits