Case ID: M11-104P^

Published: 2020-02-26 11:11:36

Last Updated: 1677134985


Lawrence Clark
Nathan Hindman
Dan Wheeler Patterson

Technology categories

Advanced Materials/NanotechnologyPhysical Science

Licensing Contacts

Shen Yan
Director of Intellectual Property - PS
[email protected]

Structures and Methods for Design Automation of Radiation Hardened Triple Mode Redundant Digital Circuits

Protecting high performance integrated circuits (ICs)
from ionizing radiation induced upset is a key issue in the design of
microcircuits for applications such as spacecraft, high altitude aircraft, and
around nuclear accidents or nuclear warfare. A radiation induced soft error
occurs in a semiconductor device when a high-energy particle travels through the
semiconductor, leaving an ionized track behind. The resultant charge can cause a
transient voltage glitch called a single even transient (SET) or flip a bistable
storage cell to its opposite state, called a single event upset (SEU). The
charge collection can affect multiple nodes. To ensure hardness, this requires
that the critical nodes be placed far enough apart so that one ionizing track
does not affect the other nodes. Radiation hardening by design (RHBD) is a new
method that promises to allow commercial circuit speeds by using
state-of-the-art foundries. However, many current RHBD techniques significantly
affect circuit speed.

Researchers at Arizona State University have developed a
fully automated circuit design and CAD methodology to implement single event
effect (SEE) hardened application specific integrated circuits (ASIC) using
triple mode redundancy (TMR) synthesis and automated place and route that is
fully self-correcting and guarantees effective critical node spacing. The TMR
circuits have been experimentally proven in both heavy ion and proton testing on
both the low standby power and standard versions of trusted foundry CMOS
technology. This technology allows standard non-redundant register transfer
language input to synthesize and fully automate placement and routing of
circuits, with virtually no timing penalty when compared to unhardened
circuitry. The layout of the circuits ensures that critical nodes are suitably
placed so as to make the nodes radiation hardened by design.

Potential Applications

  • Space Vehicles
  • Satellites
  • High Altitude Flight
  • Devices Used Near Nuclear Accidents or Nuclear Warfare
Benefits and Advantages

  • Dependable – Produces circuits that are radiation

  • Easy Application – Simple to use automated place and
    route of circuitry

  • High Speed – Virtually no timing penalty over unhardened