A Robust Asynchronous Scan Chain and Scanning Mechanism for Testing of Digital VLSI Circuits

Computing & Information Technology

A Robust Asynchronous Scan Chain and Scanning Mechanism for Testing of Digital VLSI Circuits

A Method of Obfuscating Digital Logic Circuits Using Threshold Voltage

Non-Volatile Logic Device for Energy-Efficient Logic State Restoration

FPGAs with Reconfigurable Threshold Logic Gates for Improved Performance, Power, and Area

In-Memory Hardware-Software Co-design for Image Processing

Learning Post-Stroke Gait Training Strategies by Modeling Patient-Therapist Interaction

Fabrication Trade-Off-Based Optimal Synthesis of Winding Configurations in Capacitor-Inductor-Inductor-Capacitor Converter

Time-Synchronized Topology and State Estimation in Real-Time Unobservable Distribution Systems

Gaussian Process Modeling for Heterogeneous Functions

Online Platform Development for Crowd-Sourced Design Knowledge Collection in 3D Printing