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Computing Architecture
Static and dynamic precision adaptation for hardware learning and classification
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Flexible and Efficient XNOR Circuit Architecture for Neural Network Based Deep Learning
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Fast and Efficient Max/Min Searching in DRAM
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Processing-In-Memory (PIM) Platform for mRNA Quantification
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Masked-Based Learning Method for Neural Network Multiple Task Adaption
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Single-Cycle Processing-in-SRAM Logic Circuit Design
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Dynamic and Efficient Hardware/Software Codesigns of Deep Learning Accelerators
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Clock Skewing for Area and Power Optimization of ASICs Using Differential Flipflops and Local Clocking
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In-Memory Hardware-Software Co-design for Image Processing
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