Computing Architecture

System and Circuit of Compute-in-Memory Design for Genome Alignment

Static and dynamic precision adaptation for hardware learning and classification

Flexible and Efficient XNOR Circuit Architecture for Neural Network Based Deep Learning

Fast and Efficient Max/Min Searching in DRAM

Processing-In-Memory (PIM) Platform for mRNA Quantification

Masked-Based Learning Method for Neural Network Multiple Task Adaption

Single-Cycle Processing-in-SRAM Logic Circuit Design

Dynamic and Efficient Hardware/Software Codesigns of Deep Learning Accelerators

Clock Skewing for Area and Power Optimization of ASICs Using Differential Flipflops and Local Clocking

In-Memory Hardware-Software Co-design for Image Processing