Single-Cycle Processing-in-SRAM Logic Circuit Design

Temperature-Resilient RRAM-Based In-Memory Computing for DNN Inference

An infrastructure for memory management on LLM multi-core architectures

An Efficient Stack Data Management for Scratchpad Memory based Multi-core Processors

Simulating Interconnects in Microchips for the Purpose of Rapid Failure Analysis

Flexible and Efficient XNOR Circuit Architecture for Neural Network Based Deep Learning