Algorithm Development

Improved Mapping of Computational Loops on Reconfigurable Architectures

Hybrid In-Situ & Signal of Opportunity Calibration for Antenna Arrays

Hardware-Noise-Aware Training for Improved Accuracy of In-Memory-Computing-Based Deep Neural Networks

Binary Neural Network for Improved Accuracy and Defense Against Bit-Flip Attacks

High Performance Computing Framework for Accelerating Sparse Cholesky Factorization on FPGAs

Memory Efficient, Multi-Domain On-Device Machine Learning

Systems and Algorithms for Few-Shot Node Classification on Graphs

Fast and Efficient Max/Min Searching in DRAM

Processing-In-Memory (PIM) Platform for mRNA Quantification

Optimizing Solar Power using Array Topology Reconfiguration and Deep Neural Network