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Integrated Circuits
Design Automation of Radiation Hardened Mixed Single, Dual, and Triple Mode Redundant Digital Circuits
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Pulse-Clocked TMR Flip-Flop Design for Efficient Temporal Radiation Hardening of Digital Circuits
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Simulating Interconnects in Microchips for the Purpose of Rapid Failure Analysis
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Clock Skewing Strategy to Minimize Dynamic Power and Eliminate Hold Violations in ASIC Circuits
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Fast-Tracking Phase Lock Loop (PLL) Architecture
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Clock Skewing for Area and Power Optimization of ASICs Using Differential Flipflops and Local Clocking
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