Invention Description
As artificial intelligence and data-intensive computing continue to grow, conventional memory technologies face challenges in storage density, energy efficiency, and scalability. Traditional planar and oxide-based memristors have limited ability to combine high-density data storage with advanced computing functions in a compact architecture. These limitations create a need for memory devices that can store more information while supporting computing directly within the memory. Advanced materials and 3D structures offer a promising path toward overcoming these challenges.
Professor Daphne Chen at Arizona State University has developed an ultra-scalable memory technology based on novel materials and structures. This innovative memory architecture addresses critical challenges such as the "von Neumann bottleneck," offering a transformative solution for next-generation computing paradigms. The architecture is designed to support both binary data storage and analog memory responses, with proposed uses spanning storage, inference, training, and neuromorphic-computing functions for AI-oriented systems. The approach is also being explored for low-temperature growth conditions compatible with back-end-of-line memory integration.
By overcoming the scalability limitations of BEOL memory, this breakthrough paves the way for post-CMOS computing and energy-efficient AI systems.
Potential Applications
- High-density memory storage for AI and machine learning systems
- Neuromorphic computing devices for low power AI inference
- Embedded functional memory-in-computing architectures in semiconductor industry
- Hybrid memory systems intended to help bridge volatile memory and storage
- Post-CMOS computing platforms requiring energy-efficient, high bandwidth memory
Benefits and Advantages
- Ultra-high scalability – enables scalable nonvolatile-memory structures beyond planar devices
- Low thermal budget direct growth (<500°C) of 2D MoS2 active layers
- Low voltage operation (0.5 to 1 V) for energy-efficient switching
- Multifunctionality enabling both binary storage and analog responses for memory-in-computing use cases
- Improved step coverage and integration with semiconductor back-end-of-line (BEOL) processes
- Enhanced speed and power efficiency over conventional memory technologies