Case ID: M14-257P^

Published: 2020-02-26 11:04:40

Last Updated: 1677135323


Carole-Jean Wu
Patrick Phelan
Soochan Lee

Technology categories

Advanced Materials/NanotechnologyApplied TechnologiesComputing & Information TechnologyEnergy & PowerManufacturing/Construction/MechanicalPhysical Science

Technology keywords

Materials and Electronics
Mechanical and Manufacturing

Licensing Contacts

Shen Yan
Director of Intellectual Property - PS
[email protected]

Sustainable Self-Cooling for CPU Hot Spots Using Thermoelectric Materials

One stumbling block to improved performance growth for modern processor architectures is the double-edged sword of power consumption and heat generation. As computing chips become more powerful, increased levels of energy are wasted as heat dissipates off of them. Heat loss is not uniform. Certain areas on a chip have higher average temperatures than others. These warmer areas are known as hot spots and are typically about 20-30°C warmer than the rest of the chip. Standard electronic cooling techniques either focus on heat removal techniques using active cooling methods, which require additional power input, or heat avoidance techniques such as dynamic thermal management (DTM), which deplete overall chip performance. Computational power at these hot spots is the highest on the chip, so if the energy lost as heat could be harnessed, overall chip performance would improve.

Researchers at Arizona State University have developed a method of discerning the location of hot spots and harvesting the emitted heat as power to be used for increased computation power. Thermoelectric materials harvest wasted heat from processors to generate power which can be diverted to cool the hot spots on the CPU. A sustainable self-cooling framework identifies hot spots so that thermoelectric generators (TEG) can be placed on the CPU accordingly. TEGs then use the excess heat to generate power for strategically placed thermoelectric coolers (TEC). The TECs use standard spot-cooling techniques to maintain temperature levels optimal for chip performance. Thus, optimal temperatures are maintained using only the energy generated by chip wasted heat.

Potential Applications

  • Ecofriendly data centers and servers
  • Personal electronic computing devices with improved battery life and performance
  • Miniature electronics

Benefits and Advantages

  • Improved Performance – Reduction of overall computing chip temperature increases reliability of electronic devices. Design Sustains power and performance peaks, leading to performance turbo boost.
  • Sustainable – Technique does not require any additional power input.
  • Energy Efficient – Eliminates thermal hot spots, which lowers overall system power consumption.
  • Thermal Efficiency – Less energy waste from heat loss and lower system energy requirements for heat removal.
  • Longevity – Increases chip lifetime by minimizing heat damage.
  • Temperature Control – Decrease temperature of hot spots by as much as 21°C and by an average of 7.7°C.

For more information about the inventor(s) and their research, please see

Dr. Carole-Jean Wu's directory webpage

Dr. Patrick E Phelan's directory webpage